The present invention relates to digital integrated circuits in general, and in particular to a circuit for controlling the signal propagation delay time of logic elements on an integrated circuit (IC).
Signal propagation delay time is the time it takes a pulse to pass through a logic element. Although delay time is usually fairly uniform among logic elements on the same IC, the delay time for all logic elements on an IC chip can vary with operating temperature. Propagation delay time can also vary substantially among elements on similar ICs due to differences in IC processing or design. Though circuit designers often seek to minimize propagation delay time, in some applications it is equally important that delay time be consistent and predictable despite variations in operating temperatures and IC process or design parameters.
In some logic systems, as for instance in many emitter-coupled logic element arrangements, propagation delay time is dependent, within limits, on bias signals applied to one or more transistors in the element. In the prior art, such bias signals were typically fixed and did not vary during operation of the logic element. In accordance with the present invention a means is provided to vary such bias signals during operation of a logic element such that propagation delay time of the element is held invariant for changes in operating temperature or differences in IC process parameters.